目前分類：EDA (5)
| 發表時間 | 文章標題 | 人氣 | 留言 |
|---|---|---|---|
| 2020-04-06 | [Design Compiler] "hdl-193" warning: cannot find the design 'XXX' in the library 'work'. (lbr-1) | (1525) | (0) |
| 2016-04-29 | [EDA] ERROR:Portability:3 - This Xilinx application has run out of memory | (40) | (1) |
| 2014-03-10 | [Debussy] Show signal values in nTrace (在 nTrace 視窗顯示 signal value) | (191) | (0) |
| 2012-06-15 | NCVerilog 錯誤訊息 Illegal operand for constant expression [4(IEEE)] 的解法 | (4585) | (0) |
| 2012-02-08 | [NC-Verilog] ncelab: *F,CUMSTS: Timescale directive missing on one or more modules. 錯誤訊息的原因 | (3936) | (0) |
